july 2010 ?2010 fairchild semiconductor corporation FDMS7682 rev . c www.fairchildsemi.com 1 FDMS7682 n-channel powertrench ? mosfet FDMS7682 n-channel powertrench ? mosfet 30 v, 6.3 m features ? max r ds(on) = 6.3 m at v gs = 10 v, i d = 14 a ? max r ds(on) = 10.4 m at v gs = 4.5 v, i d = 11 a ? advanced package and silic on combination for low r ds(on) and high efficiency ? next generation enhanced body diode technology, engineered for soft recovery ? msl1 robust package design ? 100% uil tested ? rohs compliant general description this n-channel mosfet has been designed specifically to improve the overall efficien cy and to minimize switch node ringing of dc/dc converters using either synchronous or conventional switching pwm c ontrollers.it has been optimized for low gate charge, low r ds(on) , fast switching speed and body diode reverse recovery performance. applications ? imvp vcore switching for notebook ? vrm vcore switching for desktop and server ? oringfet / load switching ? dc-dc conversion power 56 d d d d g s s s pin 1 bottom top g s s s d d d d 5 6 7 8 3 2 1 4 mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 30 v v gs gate to source voltage (note 4) 20 v i d drain current -continuous (package limited) t c = 25 c 22 a -continuous (silicon limited) t c = 25 c 59 -continuous t a = 25 c (note 1a) 16 -pulsed 80 e as single pulse avalanche energy (note 3) 29 mj p d power dissipation t c = 25 c 33 w power dissipation t a = 25 c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 3.7 c/w r ja thermal resistance, junction to ambient (note 1a) 50 device marking device package reel size tape width quantity FDMS7682 FDMS7682 power 56 13 ?? 12 mm 3000 units
www.fairchildsemi.com 2 FDMS7682 rev . c FDMS7682 n-channel powertrench ? mosfet electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 30 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 15 mv/c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 a i gss gate to source leakage current, forward v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a1.251.93.0v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -6 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 14 a 5.2 6.3 m v gs = 4.5 v, i d = 11 a 8.0 10.4 v gs = 10 v, i d = 14 a, t j = 125 c 7.0 8.5 g fs forward transconductance v ds = 5 v, i d = 14 a 70 s c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1 mhz 1416 1885 pf c oss output capacitance 479 640 pf c rss reverse transfer capacitance 50 75 pf r g gate resistance 0.7 2.4 t d(on) turn-on delay time v dd = 15 v, i d = 14 a, v gs = 10 v, r gen = 6 9.4 19 ns t r rise time 2.7 10 ns t d(off) turn-off delay time 22 35 ns t f fall time 2.2 10 ns q g total gate charge v gs = 0 v to 10 v v dd = 15 v, i d = 14 a 21 30 nc q g total gate charge v gs = 0 v to 4.5 v 9.9 14 nc q gs gate to source charge 4.3 nc q gd gate to drain ?miller? charge 2.8 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 2.1 a (note 2) 0.74 1.2 v v gs = 0 v, i s = 14 a (note 2) 0.83 1.3 t rr reverse recovery time i f = 14 a, di/dt = 100 a/ s 27 43 ns q rr reverse recovery charge 10 21 nc t rr reverse recovery time i f = 14 a, di/dt = 300 a/ s 20 36 ns q rr reverse recovery charge 17 30 nc 50 c/w when mounted on a 1 in 2 pad of 2 oz copper 125 c/w when mounted on a minimum pad of 2 oz copper. a) b) notes : 1. r ja is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. e as of 29 mj is based on starting t j = 25 c, l = 0.3 mh, i as = 14 a, v dd = 27 v, v gs = 10 v. 100% test at l = 0.1 mh, i as = 21 a. 4. as an n-ch device, the negative vgs rating is for low du ty cycle pulse occurrence only. no continuous rating is implied.
www.fairchildsemi.com 3 FDMS7682 rev c FDMS7682 n-channel powertrench ? mosfet typical characteristics t j = 25 c unless otherwise noted figure 1. 0123 0 20 40 60 80 v gs = 4.5 v v gs = 10 v v gs = 3.5 v v gs = 4 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 5 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics figure 2. 0 20406080 0 1 2 3 4 5 v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 3.5 v v gs = 4 v v gs = 5 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 i d = 14 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 5 10 15 20 25 i d = 14 a t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 12345 0 20 40 60 80 t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.20.40.60.81.01.2 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
www.fairchildsemi.com 4 FDMS7682 rev c FDMS7682 n-channel powertrench ? mosfet figure 7. 0 4 8 12162024 0 2 4 6 8 10 i d = 14 a v dd = 20 v v dd = 15 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 10 v gate charge characteristics figure 8. 0.1 1 10 30 10 100 1000 4000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1 10 30 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 15 30 45 60 limited by package v gs = 4.5 v r t jc = 3.7 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e op erating area 0.01 0.1 1 10 100200 0.01 0.1 1 10 100 100 us 1 ms 10 ms 100 ms dc 10 s 1 s i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c figure 12. 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 500 single pulse r t ja = 125 o c/w t a = 25 o c v gs = 10 v p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 5 FDMS7682 rev c FDMS7682 n-channel powertrench ? mosfet figure 13. 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 6 FDMS7682 rev . c FDMS7682 n-channel powertrench ? mosfet dimensional outlin e and pad layout
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